rcar_gen3: drivers: pwrc: Switch to common delay implementation
authorMarek Vasut <[email protected]>
Fri, 28 Dec 2018 19:15:33 +0000 (20:15 +0100)
committerMarek Vasut <[email protected]>
Tue, 8 Jan 2019 13:08:44 +0000 (14:08 +0100)
Replace the ad-hoc implementation of delay in PWRC driver
with common R-Car delay code.

Signed-off-by: Marek Vasut <[email protected]>
drivers/renesas/rcar/pwrc/pwrc.c
plat/renesas/rcar/platform.mk

index c01a1de9b6adb78eb8d36ca02fd85e4d6aac9250..b005caff69a57ee5ed903e2581ae20d98ed2588d 100644 (file)
@@ -17,6 +17,7 @@
 #include "iic_dvfs.h"
 #include "rcar_def.h"
 #include "rcar_private.h"
+#include "micro_delay.h"
 #include "pwrc.h"
 
 /*
@@ -122,7 +123,6 @@ RCAR_INSTANTIATE_LOCK
 #define        RST_BASE                                (0xE6160000U)
 #define        RST_MODEMR                              (RST_BASE + 0x0060U)
 #define        RST_MODEMR_BIT0                         (0x00000001U)
-#define RCAR_CONV_MICROSEC                     (1000000U)
 
 #if PMIC_ROHM_BD9571
 #define        BIT_BKUP_CTRL_OUT                       ((uint8_t)(1U << 4))
@@ -143,23 +143,6 @@ IMPORT_SYM(unsigned long, __system_ram_end__, SYSTEM_RAM_END);
 IMPORT_SYM(unsigned long, __SRAM_COPY_START__, SRAM_COPY_START);
 #endif
 
-#if RCAR_SYSTEM_SUSPEND
-static void __attribute__ ((section (".system_ram")))
-       rcar_pwrc_micro_delay(uint64_t micro_sec)
-{
-       uint64_t freq, base, val;
-       uint64_t wait_time = 0;
-
-       freq = read_cntfrq_el0();
-       base = read_cntpct_el0();
-
-       while (micro_sec > wait_time) {
-               val = read_cntpct_el0() - base;
-               wait_time = val * RCAR_CONV_MICROSEC / freq;
-       }
-}
-#endif
-
 uint32_t rcar_pwrc_status(uint64_t mpidr)
 {
        uint32_t ret = 0;
@@ -414,7 +397,7 @@ self_refresh:
        mmio_write_32(DBSC4_REG_DBACEN, 0);
 
        if (product == RCAR_PRODUCT_H3 && cut < RCAR_CUT_VER20)
-               rcar_pwrc_micro_delay(100);
+               rcar_micro_delay(100);
        else if (product == RCAR_PRODUCT_H3) {
                mmio_write_32(DBSC4_REG_DBCAM0CTRL0, 1);
                DBCAM_FLUSH(0);
@@ -465,7 +448,7 @@ self_refresh:
 
        /* Set the auto-refresh enable register */
        mmio_write_32(DBSC4_REG_DBRFEN, 0U);
-       rcar_pwrc_micro_delay(1U);
+       rcar_micro_delay(1U);
 
        if (product == RCAR_PRODUCT_M3)
                return;
index 26f3c346f5dccc40519244826d288f4f90007495..b9c080259e335f0ecf27973df3af3636052a630f 100644 (file)
@@ -378,6 +378,7 @@ BL31_SOURCES        +=      ${RCAR_GIC_SOURCES}                             \
                        plat/renesas/rcar/plat_pm.c                     \
                        drivers/renesas/rcar/console/rcar_console.S     \
                        drivers/renesas/rcar/console/rcar_printf.c      \
+                       drivers/renesas/rcar/delay/micro_delay.c        \
                        drivers/renesas/rcar/pwrc/call_sram.S           \
                        drivers/renesas/rcar/pwrc/pwrc.c                \
                        drivers/renesas/rcar/common.c                   \